1. Field of the Invention
The present invention relates to a binary translator for directly translating binary code of a legacy processor to executable binary code for a native processor and more particularly to a binary translator formed as reconfigurable translator that is suitable for use with different legacy processors and/or operating systems as well as different native processors in which the legacy code may be translated statically, dynamically or just in time and allows new code to be inserted or portions of the legacy code to be disabled without modification of the legacy binary code.
2. Description of the Prior Art
It is known that microprocessors are configured with different instruction set architectures (ISA). The ISA determines the instruction set for a particular microprocessor. Application programs to be executed by a microprocessor are normally written in a relatively high level language known as source code, for example in C or C++ and compiled into machine instructions compatible with the instruction set for a specific microprocessor. The machine instructions are known as binary code, object code and executable code.
Due to the age and obsolescence of many existing microprocessors and their corresponding slow speed, it is often desired to replace outdated existing microprocessors, hereinafter referred to as “legacy microprocessors”, and “legacy processors”, with newer faster microprocessors, herein referred to as “native microprocessors” or “native processors”. Unfortunately, depending on the upgrade, the instruction set of the native processor is often times incompatible with the instruction set of the legacy processor. As such, various techniques have been developed to enable application programs written for legacy processors to be utilized on newer native processors. For example, software emulators are known. Such software emulators are based upon emulation of the various machine code instructions of a legacy processor used in an application program. Such emulators are known to include software handlers formed from one or more native instructions to accomplish the same function as the legacy instruction being emulated. Examples of such instruction emulator systems are disclosed in commonly owned U.S. Pat. Nos. 6,041,402; 6,212,614; and 6,272,453 as well as commonly owned U.S. patent application Ser. No. 10/382, 598, filed on Mar. 6, 2003, entitled “Direct Instructions Rendering Emulation Computer Technique”, now U.S. Pat. No. 7,219,337, issued on May 15, 2007.
There are several reasons why a binary translator may be needed. First, the legacy source code may not be available to facilitate a software port to a modern computer architecture. Secondly, the software overhead associated with traditional emulation systems slows the processing speed down considerably. Binary translation, then, is the only feasible choice for legacy code reuse on a newer, incompatible hardware platform.
Such binary translators translate the binary code of a legacy processor directly into binary instructions of a native processor. Examples of such binary translators are disclosed in U.S. Pat. Nos. 6,223,339; 6,314,560; and 6,502,237. Binary translators are also disclosed in; “DIGITAL FX!32 Running on 32-bit x86 Applications on Alpha NT, by R. Hookway, Digital Equipment Corporation Compcon '97 proceedings, IEEE, Feb. 23-26, 1997, San Jose, Calif., pages 37-42; “Advances and Future Challenges in Binary Translation and Optimization”, by Altman et al., Proceedings of the IEEE, Vol. 89, no. 11, November 2001, pages 1710-1722; Ditigal FX!32: Combining Emulation and Binary Translation, by Hookway et al. Digital Technical Journal, Vol. 9, No. 1, 1997, pages 1-12; “PA-RISC to IA-64: Transparent Execution, No Recompilation, Zheng, et al., Computer Magazine, pages 47-52, Vol. 33, March 2000.
Although the known binary translators are able to effectively translate legacy binary code to native binary code without modifying the legacy binary code, there are problems associated with such known binary translators. For example, most known binary translators are developed for a single legacy/native processor and operating system combination. Thus, application programs running on different legacy processors and/or native processors will require separate translators. In addition, such known translators do not allow for the addition of new native code written in a modern programming language for the purpose of disabling portions of the legacy code or enhancing it without needing to re-compile the program, which would require access to the original source code. Thus, there is a need for a binary translator for translating legacy binary instructions to native instructions that is suitable for use with multiple legacy processors and native processors and/or operating systems and can be modularly optimized at both the legacy and native instruction level and allows for adding new native code without recompiling the legacy program.